Stack position determination in memory devices configured for stacked arrangements
US-9218854-B2 · Dec 22, 2015 · US
US8949574B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8949574-B2 |
| Application number | US-201414330327-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 14, 2014 |
| Priority date | Nov 1, 2001 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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A method is comprised of inputting a comparand word to a plurality of hash circuits, each hash circuit being responsive to a different portion of the comparand word. The hash circuits output a hash signal which is used to enable or precharge portions of a CAM. The comparand word is also input to the CAM. The CAM compares the comparand word in the precharged portions of the CAM and outputs information responsive to the comparing step. When used to process Internet addresses, the information output may be port information or an index from which port information may be located. A circuit is also disclosed as is a method of initializing the circuit.
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What is claimed is: 1. A system, comprising: routing logic configured to determine routing of a data packet based on a comparison of a comparand word of the data packet with a stored comparand word, and wherein the routing logic comprises: content addressable memory configured to store a plurality of comparand words, each of the plurality of comparand words associated with a destination; and enable logic configured to enable a portion of the content addressable memory responsiv…
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