Multi-precision digital compute-in-memory deep neural network engine for flexible and energy efficient inferencing
US-12079733-B2 · Sep 3, 2024 · US
US8949567B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8949567-B2 |
| Application number | US-201313777137-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 26, 2013 |
| Priority date | Feb 26, 2013 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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A plurality of addressable memory tiles each comprise one or more cross-point arrays. Each array comprises a plurality of non-volatile resistance-change memory cells. A controller is configured to couple to the array and to a host system. The controller is configured to perform receiving, from the host system, one or more data objects each having a size equal to a predetermined logical block size, and storing the one or more data objects in a corresponding integer number of one or more of the memory tiles.
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What is claimed is: 1. An apparatus, comprising: a plurality of addressable memory tiles each comprising one or more cross-point arrays, each array comprising a plurality of non-volatile resistance-change memory cells; and a controller configured to couple to the array and to a host system, the controller configured to perform: receiving, from the host system, one or more data objects each having a size equal to a predetermined logical block size; and storing the one or more…
Physics · mapped topic
Physics · mapped topic
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