Method for checking the integrity of a compute node
US-2024303346-A1 · Sep 12, 2024 · US
US8949404B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8949404-B2 |
| Application number | US-13576105-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 24, 2005 |
| Priority date | May 24, 2005 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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Systems, methodologies, and media associated with acquiring a graphics mode post-failure screen provided by a graphical operating system running on a self-reset capable computer are described. One exemplary method embodiment may be performable in a management processor (e.g., ASIC, FPGA) that is configured to be operably connected to a computer (e.g., server) that is configured to provide a graphical post-failure screen and to self-reset upon entering a failure state. The exemplary method embodiment may include receiving a stream of video data from the computer and making it available to a downstream component like a remote console application. The exemplary method may also include performing a screen refresh after detecting the failure state in the computer. The exemplary method may also include selectively storing the graphical post-failure screen in a memory associated with the management processor.
Opening claim text (preview).
What is claimed is: 1. A system, comprising: a compression logic configured to receive a digital video stream from a video adapter associated with a computer with a display, to compress the digital video stream into a compressed digital video data, and to make the compressed digital video data available to a downstream component; a control logic configured to detect that the computer has entered a failure state due to an unrecoverable error that will cause the computer to automa…
Physics · mapped topic
Physics · mapped topic
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