Chip packaging method, chip packaging module, and embedded substrate chip packaging structure
US-2024413138-A1 · Dec 12, 2024 · US
US8948712B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8948712-B2 |
| Application number | US-201213485572-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 31, 2012 |
| Priority date | May 31, 2012 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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Aspects of the present disclosure relate to determining the location and/or density of vias that form part of an RF isolation structure of a packaged module and the resulting RF isolation structures. From electromagnetic interference (EMI) data, locations of where via density can be increased and/or decreased without significantly degrading the EMI performance of the RF isolation structure can be identified. In certain embodiments, one or more vias can be added and/or removed from a selected area of the packaged module based on the EMI data.
Opening claim text (preview).
What is claimed is: 1. A packaged module comprising: a substrate configured to receive at least one component; a radio frequency (RF) component coupled to a major surface of the substrate; a ground contact disposed below the RF component, the ground contact configured to receive a ground potential from external to the packaged module; a plurality of vias in the substrate, the plurality of vias disposed around the RF component, the plurality of vias having a higher density in…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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