Enhanced immunity from electrostatic discharge

US8947839B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8947839-B2
Application numberUS-51244109-A
CountryUS
Kind codeB2
Filing dateJul 30, 2009
Priority dateJul 30, 2009
Publication dateFeb 3, 2015
Grant dateFeb 3, 2015

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Enhanced electrostatic discharge (“ESD”) protection for an integrated circuit is described. An embodiment relates generally to a circuit for protection against ESD. The circuit has an input/output node and a driver. The driver has a first transistor and a second transistor. A first source/drain node of the first transistor is coupled to the input/output node. A second source/drain node of the first transistor forms a first interior node capable of accumulating charge when electrically floating. A first current flow control circuit is coupled to a discharge node and the second source/drain node of the first transistor. The first current flow control circuit is electrically oriented in a bias direction for allowing accumulated charge to discharge from the first interior node via the first current flow control circuit to the discharge node.

First claim

Opening claim text (preview).

What is claimed is: 1. A circuit for protection against electrostatic discharge, comprising: an input/output node and a driver, wherein the driver includes a first transistor and a second transistor of a same polarity coupled to one another in source-drain series at a first interior node of the driver; a first source/drain node of the first transistor coupled to the input/output node; a second source/drain node of the first transistor of the first interior node of the driver c…

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Next steps

Free tools are coming soon. Tell us what you want to track and we'll notify you.

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US8947839B2 cover?
Enhanced electrostatic discharge (“ESD”) protection for an integrated circuit is described. An embodiment relates generally to a circuit for protection against ESD. The circuit has an input/output node and a driver. The driver has a first transistor and a second transistor. A first source/drain node of the first transistor is coupled to the input/output node. A second source/drain node of the f…
Who is the assignee on this patent?
Karp James, Xilinx Inc
What technology area does this patent fall under?
Primary CPC classification H03K19/00361. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).