Method for adjusting frame-listening cycle, shelf label system, and computer device
US-2024105145-A1 · Mar 28, 2024 · US
US8947445B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8947445-B2 |
| Application number | US-201213494332-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 12, 2012 |
| Priority date | Oct 20, 2011 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A display controller includes a graphic memory, a graphic memory control unit and a scan control unit. The graphic memory has a storage capacity defined by a first directional size multiplied by a second directional size. The graphic memory control unit converts two-dimensional (2-D) addresses to one-dimensional (1-D) addresses based on an input clock signal and first directional total pixel number of a display panel for displaying input data, converts the 1-D addresses to physical 2-D addresses based on the first directional size and controls the graphic memory to store the input data. The display panel has a resolution corresponding to the first directional total pixel number multiplied by a second directional total pixel number of the display panel. The scan control unit increases scan addresses one line by one line to display data stored in the graphic memory according to a display resolution.
Opening claim text (preview).
What is claimed is: 1. A display controller comprising: a graphic memory having a storage capacity defined by a first directional size multiplied by a second directional size; a graphic memory controller configured to, convert two-dimensional (2-D) addresses to one-dimensional (1-D) addresses based on an input clock signal and first directional total pixel number of a display panel, convert the 1-D addresses to physical 2-D addresses based on the first directional size, and…
Related publications grouped by family.
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Answers are generated from the same data shown on this page.