Display device

US8947418B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8947418-B2
Application numberUS-201113989492-A
CountryUS
Kind codeB2
Filing dateOct 5, 2011
Priority dateNov 25, 2010
Publication dateFeb 3, 2015
Grant dateFeb 3, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device in which low power consumption is realized without lowering an aperture ratio is provided. A liquid crystal capacitive element Clc is sandwiched between a pixel electrode 20 and an opposite electrode 80 . The pixel electrode 20 , one end of a first switch circuit 22 , one end of a second switch circuit 23 and a first terminal of a second transistor T 2 form an internal node N 1 . The other terminals of the first switch circuit 22 and the second switch circuit 23 are connected to a source line SL. The second switch circuit 23 is a series circuit composed of a first transistor T 1 and a diode D 1 . A control terminal of the first transistor T 1 , a second terminal of the second transistor T 2 and one end of a boost capacitive element Cbst form an output node N 2 . The other end of the boost capacitive element Cbst and the control terminal of the second transistor T 2 are connected to a boost line BST and a reference line REF, respectively. The diode D 1 has a rectifying function from the source line SL to the internal node N 1.

First claim

Opening claim text (preview).

The invention claimed is: 1. A display device having a pixel circuit array comprising a plurality of pixel circuits arranged in a row direction and a column direction, respectively, wherein each of the pixel circuits has: a display element part including a unit display element; an internal node composing a part of the display element part, for holding a pixel data voltage applied to the display element part; a first switch circuit; a second switch circuit; and a control circuit in…

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What does patent US8947418B2 cover?
A display device in which low power consumption is realized without lowering an aperture ratio is provided. A liquid crystal capacitive element Clc is sandwiched between a pixel electrode 20 and an opposite electrode 80 . The pixel electrode 20 , one end of a first switch circuit 22 , one end of a second switch circuit 23 and a first terminal of a second transistor T 2 form an internal …
Who is the assignee on this patent?
Nakano Fumiki, Ueda Naoki, Yamauchi Yoshimitsu, and 1 more
What technology area does this patent fall under?
Primary CPC classification G09G3/3648. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).