Analog-to-digital conversion circuit
US-9496885-B2 · Nov 15, 2016 · US
Successive approximation AD converter
US8947290B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8947290-B2 |
| Application number | US-201314071195-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 4, 2013 |
| Priority date | May 10, 2011 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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Abstract
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A higher-order DAC and a lower-order DAC each have a plurality of capacitive elements having capacitance values weighted with a binary ratio and are configured so that a first terminal of each of the capacitive elements is connected to a common node and a second terminal thereof is connected to either a first or second voltage selectively. The higher-order DAC and the lower-order DAC are coupled by a coupling capacitor. A higher-order DAC control circuit outputs either a correction control signal or a digital signal output from a successive approximation circuit selectively to the higher-order DAC. The lower-order DAC has at least one variable capacitive element of which a first terminal is connected to the common node and a second terminal is connected to either the first or second voltage selectively depending on a higher-order bit of the digital signal output from the successive approximation circuit to the higher-order DAC.
First claim
Opening claim text (preview).
What is claimed is: 1. A successive approximation AD converter configured to convert an analog input voltage to a digital value, comprising: a capacitance DAC including a higher-order DAC having a plurality of capacitive elements having capacitance values weighted with a binary ratio, configured so that a first terminal of each of the capacitive elements is connected to a first common node and a second terminal thereof is connected to either a first or second voltage selectively d…
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- H03M1/1033Primary
Electricity · mapped topic
Electricity · mapped topic
- H03M1/1061Primary
Electricity · mapped topic
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- What does patent US8947290B2 cover?
- A higher-order DAC and a lower-order DAC each have a plurality of capacitive elements having capacitance values weighted with a binary ratio and are configured so that a first terminal of each of the capacitive elements is connected to a common node and a second terminal thereof is connected to either a first or second voltage selectively. The higher-order DAC and the lower-order DAC are couple…
- Who is the assignee on this patent?
- Panasonic Corp, Panasonic Ip Man Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H03M1/1033. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).