ADC with noise-shaping SAR

US8947285B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8947285-B2
Application numberUS-201313795347-A
CountryUS
Kind codeB2
Filing dateMar 12, 2013
Priority dateMar 12, 2013
Publication dateFeb 3, 2015
Grant dateFeb 3, 2015

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Abstract

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Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A multistage comparator using a feed-forward technique can provide noise shaping of conversion errors. For example, the comparator may feed a conversion error forward from a first stage to a next stage of the multistage comparator.

First claim

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What is claimed is: 1. An apparatus, comprising: a first stage arranged to receive an analog input and to perform a first conversion based on the analog input; a delay component arranged to receive and delay a conversion error of the first conversion, based on a predetermined delay; a combiner arranged to receive an output of the first stage and to combine the output with the error to form an input of a next stage; and a next stage arranged to receive the output of the first…

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What does patent US8947285B2 cover?
Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A multistage comparator using a feed-forward technique can provide noise shaping of conversion errors. For example, the comparator may feed a conversion error forward from a first stage to a next stage of the multistage comparator.
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H03M1/0617. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).