Multi-chip package

US8947152B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8947152-B2
Application numberUS-201314038363-A
CountryUS
Kind codeB2
Filing dateSep 26, 2013
Priority dateApr 11, 2013
Publication dateFeb 3, 2015
Grant dateFeb 3, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multi-chip package having a plurality of slice chips coupled through a through-via, at least one slice chip may include an input unit suitable for receiving a slice activation signal, and outputting the slice activation signal to the through-via in response to a slice identification corresponding to the slice chip, a first output unit suitable for outputting the activation signal transferred through the through-via to an internal circuit of the slice chip in response to the corresponding slice identification, and a second output unit suitable for selectively outputting the activation signal transferred through the through-via to the internal circuit of the slice chip in a predetermined activation mode for the multi-chip package.

First claim

Opening claim text (preview).

What is claimed is: 1. A multi-chip package system, comprising: a multi-chip package having a plurality of slice chips coupled each other by using a first through-via and a second through-via, wherein at least one slice chip includes: a first signal transfer unit, and a second signal transfer unit, wherein the first signal transfer unit is suitable for transferring a first slice activation signal to the first through-via and an internal circuit of the slice chip, and the seco…

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What does patent US8947152B2 cover?
A multi-chip package having a plurality of slice chips coupled through a through-via, at least one slice chip may include an input unit suitable for receiving a slice activation signal, and outputting the slice activation signal to the through-via in response to a slice identification corresponding to the slice chip, a first output unit suitable for outputting the activation signal transferred …
Who is the assignee on this patent?
Sk Hynix Inc
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).