Semiconductor integrated circuit and operation method thereof
US-2015378351-A1 · Dec 31, 2015 · US
PWM signal generation circuit and processor system
US8947145B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8947145-B2 |
| Application number | US-201214006622-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 24, 2012 |
| Priority date | Mar 28, 2011 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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Abstract
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A PWM signal generation circuit according to the present invention includes a duty setting unit ( 10 ) configured to generate a duty control signal designating a duty ratio corresponding to each period of a PWM signal on the basis of an initial duty setting signal, a target duty setting signal, a slope setting signal, and a clock signal, a period setting unit ( 20 ) configured to output a period setting value, and an output control unit ( 30 ) configured to generate the PWM signal having a period corresponding to the period setting value and having a duty ratio corresponding to a value of the duty control signal. The duty setting unit ( 10 ) increases the value of the initial duty ratio to the value of the target duty ratio each time the number of a clock pulse of the clock signal reaches the period setting value reaches the slope setting value.
First claim
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The invention claimed is: 1. A PWM signal generation circuit for generating a PWM signal, comprising: a duty setting unit configured to generate a duty control signal designating a duty ratio corresponding to each period of the PWM signal on the basis of an initial duty setting signal designating a value of an initial duty ratio of the PWM signal at the start of generation of the PWM signal, a target duty setting signal designating a value of a target duty ratio of the PWM signal,…
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- What does patent US8947145B2 cover?
- A PWM signal generation circuit according to the present invention includes a duty setting unit ( 10 ) configured to generate a duty control signal designating a duty ratio corresponding to each period of a PWM signal on the basis of an initial duty setting signal, a target duty setting signal, a slope setting signal, and a clock signal, a period setting unit ( 20 ) configured to output a perio…
- Who is the assignee on this patent?
- Fujiwara Yasuyuki, Renesas Electronics Corp
- What technology area does this patent fall under?
- Primary CPC classification H03K7/08. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).