Method for manufacturing semiconductor memory device and semiconductor memory device

Patent metadata

Field	Value
Publication number	US-8946809-B2
Application number	US-201314017472-A
Country	US
Kind code	B2
Filing date	Sep 4, 2013
Priority date	Mar 22, 2013
Publication date	Feb 3, 2015
Grant date	Feb 3, 2015

Abstract

According to one embodiment, a method is disclosed for manufacturing a semiconductor memory device. The method includes forming a first stopper film forming a lower gate layer, making a recess in the lower gate layer, filling a sacrificial film into the recess, forming a second stopper film, making an opening in the second stopper film, forming a stacked body. The stacked body includes electrode films and insulating films. The method includes, making a slit in the stacked body, making a hole in the stacked body, removing the sacrificial film via the hole, forming a memory film including a charge storage film. The method includes forming a channel body on a side wall of the memory film. An etching rate of the first stopper film and the second stopper film is lower than an etching rate of the electrode films and the insulating films.

First claim

What is claimed is:

1. A method for manufacturing a semiconductor memory device, comprising:
forming a first stopper film on a substrate;
forming a lower gate layer on the first stopper film;
making a recess in the lower gate layer;
filling a sacrificial film into the recess;
forming a second stopper film on the sacrificial film and on the lower gate layer;
making an opening in the second stopper film to expose a portion of the sacrificial film;
forming a stacked body…

Assignees

• Toshiba Kk

Inventors

• Takamura Kazuhide
• Katsumata Ryota
• Kidoh Masaru
• Uozumi Yoshihiro
• Ichinose Daigo
• Matsuda Toru

Classifications

• H10D86/60

  Electricity · mapped topic

• H10D86/40

  Electricity · mapped topic

• H10D88/01

  Electricity · mapped topic

• H10D84/038

  Electricity · mapped topic

• H10D30/693

  Electricity · mapped topic