Semiconductor device

US8946709B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8946709-B2
Application numberUS-201113045873-A
CountryUS
Kind codeB2
Filing dateMar 11, 2011
Priority dateMar 19, 2010
Publication dateFeb 3, 2015
Grant dateFeb 3, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device with a novel structure is provided in which stored data can be held even when power is not supplied and the number of writing is not limited. The semiconductor includes a second transistor and a capacitor over a first transistor. The capacitor includes a source or drain electrode and a gate insulating layer of the second transistor and a capacitor electrode over an insulating layer which covers the second transistor. The gate electrode of the second transistor and the capacitor electrode overlap at least partly with each other with the insulating layer interposed therebetween. By forming the gate electrode of the second transistor and the capacitor electrode using different layers, an integration degree of the semiconductor device can be improved.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a memory cell comprising: a first transistor comprising: a first channel formation region; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer, the first gate electrode overlapping with the first channel formation region; a second transistor over the first transistor, the second transistor comprising: a second channel formati…

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What does patent US8946709B2 cover?
A semiconductor device with a novel structure is provided in which stored data can be held even when power is not supplied and the number of writing is not limited. The semiconductor includes a second transistor and a capacitor over a first transistor. The capacitor includes a source or drain electrode and a gate insulating layer of the second transistor and a capacitor electrode over an insula…
Who is the assignee on this patent?
Kato Kiyoshi, Nagatsuka Shuhei, Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D86/423. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).