Systems and methods of testing memory devices
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Semiconductor device
US8946705B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8946705-B2 |
| Application number | US-77812310-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 12, 2010 |
| Priority date | May 20, 2009 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device, comprising: a semiconductor chip having a principal surface on which a plurality of bonding pads are disposed and a back surface opposite the principal surface, wherein the principal surface of the semiconductor chip is covered by a protective film in which a plurality of openings are formed, wherein a peripheral portion of an upper surface each of the bonding pads is covered by the protective film and a portion other than the per…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8946705B2 cover?
- A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the prote…
- Who is the assignee on this patent?
- Yasumura Bunji, Tsuchiya Fumio, Ito Hisanori, and 4 more
- What technology area does this patent fall under?
- Primary CPC classification H10P74/273. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).