Semiconductor device

Patent metadata

Field	Value
Publication number	US-8946704-B2
Application number	US-201414264311-A
Country	US
Kind code	B2
Filing date	Apr 29, 2014
Priority date	Feb 2, 2012
Publication date	Feb 3, 2015
Grant date	Feb 3, 2015

Abstract

A semiconductor device in which release of oxygen from side surfaces of an oxide semiconductor film including c-axis aligned crystal parts can be prevented is provided. The semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film including c-axis aligned crystal parts, and an oxide film including c-axis aligned crystal parts. In the semiconductor device, the first oxide semiconductor film, the second oxide semiconductor film, and the oxide film are each formed using a IGZO film, where the second oxide semiconductor film has a higher indium content than the first oxide semiconductor film, the first oxide semiconductor film has a higher indium content than the oxide film, the oxide film has a higher gallium content than the first oxide semiconductor film, and the first oxide semiconductor film has a higher gallium content than the second oxide semiconductor film.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first oxide semiconductor film;
a second oxide semiconductor film over the first oxide semiconductor film, the second oxide semiconductor film comprising a channel region and a low-resistance region;
a gate insulating film over the second oxide semiconductor film;
a gate electrode over the gate insulating film;
a first insulating film in contact with a side surface of the gate electrode;
a first electrode in contact with a side surface of the second oxide semiconductor film; and
a second electrode in contact with the first electrode, the second oxide semiconductor film, and the first insulating film,
wherein a resistance of the low-resistance region is lower than a resistance of the channel region,
wherein the gate electrode overlaps the channel region, and
wherein the low-resistance region is in contact with the first electrode and the second electrode.

2. The semiconductor device according to claim 1 , wherein the second electrode is in contact with a top surface of the second oxide semiconductor film.

3. The semiconductor device according to claim 1 , wherein the gate electrode faces a side surface of the channel region.

4. The semiconductor device according to claim 1 , wherein the second oxide semiconductor film comprises a c-axis aligned crystal part.

5. The semiconductor device according to claim 1 ,
wherein each of the first oxide semiconductor film and the second oxide semiconductor film comprises indium, gallium, and zinc,
wherein an indium content in the second oxide semiconductor film is higher than an indium content in the first oxide semiconductor film, and
wherein a gallium content in the first oxide semiconductor film is higher than a gallium content in the second oxide semiconductor film.

6. The semiconductor device according to claim 1 , wherein an atomic ratio of indium, gallium, and zinc in the first oxide semiconductor film is substantially 1:1:1.

7. The semiconductor device according to claim 1 , wherein an atomic ratio of indium, gallium, and zinc in the second oxide semiconductor film is substantially 3:1:2.

8. The semiconductor device according to claim 4 ,
wherein in the c-axis aligned crystal part of the second oxide semiconductor film, a plurality of metal atoms and oxygen atoms are arranged in a layered manner along a c-axis direction parallel to a normal vector of a surface where the second oxide semiconductor film is formed.

9. A semiconductor device comprising:
a first oxide semiconductor film;
a second oxide semiconductor film over the first oxide semiconductor film, the second oxide semiconductor film comprising a channel region and a low-resistance region;
a gate insulating film over the second oxide semiconductor film;
a gate electrode over the gate insulating film;
a first insulating film in contact with a side surface of the gate electrode;
a first electrode in contact with a side surface of the second oxide semiconductor film; and
a second electrode in contact with the first electrode, the second oxide semiconductor film, and the first insulating film,
wherein a resistance of the low-resistance region is lower than a resistance of the channel region,
wherein the gate electrode overlaps the channel region,
wherein the low-resistance region is in contact with the first electrode and the second electrode, and
wherein the side surface of the gate electrode and a boundary between the channel region and the low-resistance region are aligned.

10. The semiconductor device according to claim 9 , wherein the second electrode is in contact with a top surface of the second oxide semiconductor film.

11. The semiconductor device according to claim 9 , wherein the gate electrode faces a side surface of the channel region.

12. The semiconductor device according to claim 9 , wherein the second oxide semiconductor film comprises a c-axis aligned crystal part.

13. The semiconductor device according to claim 9 ,
wherein each of the first oxide semiconductor film and the second oxide semiconductor film comprises indium, gallium, and zinc,
wherein an indium content in the second oxide semiconductor film is higher than an indium content in the first oxide semiconductor film, and
wherein a gallium content in the first oxide semiconductor film is higher than a gallium content in the second oxide semiconductor film.

14. The semiconductor device according to claim 9 , wherein an atomic ratio of indium, gallium, and zinc in the first oxide semiconductor film is substantially 1:1:1.

15. The semiconductor device according to claim 9 , wherein an atomic ratio of indium, gallium, and zinc in the second oxide semiconductor film is substantially 3:1:2.

16. The semiconductor device according to claim 12 ,
wherein in the c-axis aligned crystal part of the second oxide semiconductor film, a plurality of metal atoms and oxygen atoms are arranged in a layered manner along a c-axis direction parallel to a normal vector of a surface where the second oxide semiconductor film is formed.

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei

Classifications

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/6756

  Amorphous oxide semiconductors · CPC title

• H10D62/40

  Crystalline structures · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D62/405

  Orientations of crystalline planes · CPC title