Semiconductor device and manufacturing method thereof

US8946097B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8946097-B2
Application numberUS-201313860938-A
CountryUS
Kind codeB2
Filing dateApr 11, 2013
Priority dateDec 8, 2009
Publication dateFeb 3, 2015
Grant dateFeb 3, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A manufacturing method of a semiconductor device, which includes the steps of forming a gate electrode layer over a substrate having an insulating surface, forming a gate insulating layer over the gate electrode layer, forming an oxide semiconductor layer over the gate insulating layer, forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer, forming an insulating layer including oxygen over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and after formation of an insulating layer including hydrogen over the insulating layer including oxygen, performing heat treatment so that hydrogen in the insulating layer including hydrogen is supplied to at least the oxide semiconductor layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a semiconductor device, the method comprising the steps of: forming a gate electrode; forming a first insulating layer over the gate electrode; forming an oxide semiconductor layer over the first insulating layer; and performing a first heat treatment after forming the oxide semiconductor layer; wherein the first heat treatment is performed first in an inert gas atmosphere and then in a gas comprising oxygen.…

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What does patent US8946097B2 cover?
A manufacturing method of a semiconductor device, which includes the steps of forming a gate electrode layer over a substrate having an insulating surface, forming a gate insulating layer over the gate electrode layer, forming an oxide semiconductor layer over the gate insulating layer, forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer, forming an i…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10P95/94. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).