Methods of forming semiconductor devices
US-2024387699-A1 · Nov 21, 2024 · US
Method of forming trench in semiconductor substrate
US8946078B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8946078-B2 |
| Application number | US-201213426624-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 22, 2012 |
| Priority date | Mar 22, 2012 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
The present invention provides a method of forming a trench in a semiconductor substrate. First, a first patterned mask layer is formed on a semiconductor substrate. The first patterned mask layer has a first trench. Then, a material layer is formed along the first trench. Then, a second patterned mask layer is formed on the material layer to completely fill the first trench. A part of the material layer is removed when the portion of the material layer between the second patterned mask layer and the semiconductor substrate is maintained so as to form a second trench. Lastly, an etching process is performed by using the first patterned mask layer and the second patterned mask layer as a mask.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of forming a trench in a substrate, comprising: providing a substrate; forming a first patterned mask layer on the substrate, wherein the first patterned mask layer has a first trench; forming a material layer comprehensively on the substrate, wherein the material layer is formed on a bottom surface and at least a sidewall of the first trench; forming a second mask layer on the material layer to completely fill the first trench; completely r…
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Classifications
Electricity · mapped topic
- H10P76/4085Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8946078B2 cover?
- The present invention provides a method of forming a trench in a semiconductor substrate. First, a first patterned mask layer is formed on a semiconductor substrate. The first patterned mask layer has a first trench. Then, a material layer is formed along the first trench. Then, a second patterned mask layer is formed on the material layer to completely fill the first trench. A part of the mate…
- Who is the assignee on this patent?
- Chen Tong-Yu, Wang Chih-Jung, United Microelectronics Corp
- What technology area does this patent fall under?
- Primary CPC classification H10P76/4085. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).