Method for forming source/drain contacts
US-2024379814-A1 · Nov 14, 2024 · US
Methods for producing a tunnel field-effect transistor
US8946037B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8946037-B2 |
| Application number | US-201313957277-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 1, 2013 |
| Priority date | Jan 20, 2005 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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Abstract
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A method for producing a tunnel field-effect transistor is disclosed. Connection regions of different doping types are produced by means of self-aligning implantation methods.
First claim
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What is claimed is: 1. A method of forming an integrated circuit, the method comprising: forming an auxiliary layer over a substrate; forming at least one auxiliary region by patterning the auxiliary layer and removing material of the auxiliary layer; forming a first spacer element in a region in which material of the auxiliary layer has been removed; doping a first connection region having a first doping type of a transistor, the first spacer element and the auxiliary regio…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8946037B2 cover?
- A method for producing a tunnel field-effect transistor is disclosed. Connection regions of different doping types are produced by means of self-aligning implantation methods.
- Who is the assignee on this patent?
- Infineon Technologies Ag
- What technology area does this patent fall under?
- Primary CPC classification H10D84/013. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).