Strained semiconductor device and method of making the same

Patent metadata

Field	Value
Publication number	US-8946034-B2
Application number	US-201314087918-A
Country	US
Kind code	B2
Filing date	Nov 22, 2013
Priority date	Sep 13, 2005
Publication date	Feb 3, 2015
Grant date	Feb 3, 2015

Abstract

In a method for forming a semiconductor device, a gate electrode is formed over a semiconductor body (e.g., bulk silicon substrate or SOI layer). The gate electrode is electrically insulated from the semiconductor body. A first sidewall spacer is formed along a sidewall of the gate electrode. A sacrificial sidewall spacer is formed adjacent the first sidewall spacer. The sacrificial sidewall spacer and the first sidewall spacer overlying the semiconductor body. A planarization layer is formed over the semiconductor body such that a portion of the planarization layer is adjacent the sacrificial sidewall spacer. The sacrificial sidewall spacer can then be removed and a recess etched in the semiconductor body. The recess is substantially aligned between the first sidewall spacer and the portion of the planarization layer. A semiconductor material (e.g., SiGe or SiC) can then be formed in the recess.

First claim

What is claimed is:

1. A method of fabricating a semiconductor device, the method comprising:
forming a first gate electrode and a second gate electrode over a semiconductor body, the first and second gate electrodes being electrically insulated from the semiconductor body;
forming a first sidewall spacer along a first sidewall of the first gate electrode and a second sidewall spacer along a second sidewall of the second gate electrode;
forming first and second sacrificial sid…

Assignees

• Infineon Technologies Ag

Inventors

• Tews Helmut Horst
• Schenk Andre

Classifications

• H10D86/201

  Electricity · mapped topic

• H10D84/0184

  Electricity · mapped topic

• H10D84/0167

  Electricity · mapped topic

• H10D84/83

  Electricity · mapped topic

• H10D84/038

  Electricity · mapped topic