Semiconductor memory device and manufacturing method of semiconductor memory device
US-2024313073-A1 · Sep 19, 2024 · US
US8946017B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8946017-B2 |
| Application number | US-201213351456-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 17, 2012 |
| Priority date | Jun 1, 2005 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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Numerous other aspects are provided a method for making a nonvolatile memory cell. The method includes forming a non-planar dielectric structure, and conformally depositing a semiconductor layer over the dielectric structure. A portion of the semiconductor layer serves as a channel region for a transistor, and the channel region is non-planar in shape.
Opening claim text (preview).
The invention claimed is: 1. A method for forming a monolithic three dimensional memory array, the method comprising: forming a first plurality of substantially parallel, substantially coplanar rail-shaped dielectric features extending in a first direction; conformally depositing a first semiconductor layer over the first rail-shaped dielectric features, wherein the deposited first semiconductor layer has a corrugated shape; conformally forming a first charge storage stack ove…
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