Thin-film transistor, array substrate having the thin-film transistor and method of manufacturing the array substrate

US8946005B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8946005-B2
Application numberUS-201113030213-A
CountryUS
Kind codeB2
Filing dateFeb 18, 2011
Priority dateJun 14, 2007
Publication dateFeb 3, 2015
Grant dateFeb 3, 2015

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing an array substrate, comprising: providing a base substrate including a active region, a pixel region and wiring region; forming an oxide semiconductor layer and a source metal layer on the base substrate, wherein the oxide semiconductor layer being disposed under the source metal layer; patterning the source metal layer to form a source remaining pattern in the active region and a data line in the wiring region; patterning the…

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Next steps

Free tools are coming soon. Tell us what you want to track and we'll notify you.

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US8946005B2 cover?
A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and d…
Who is the assignee on this patent?
Lee Je-Hun, Kim Do-Hyun, Lee Eun-Guk, and 2 more
What technology area does this patent fall under?
Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).