Copper post solder bumps on substrates

US8945995B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8945995-B2
Application numberUS-201314015504-A
CountryUS
Kind codeB2
Filing dateAug 30, 2013
Priority dateApr 1, 2011
Publication dateFeb 3, 2015
Grant dateFeb 3, 2015

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Abstract

Official abstract text for this publication.

A method comprises forming semiconductor flip chip interconnects having electrical connecting pads and electrically conductive posts terminating in distal ends operatively associated with the pads. We solder bump the distal ends by injection molding, mask the posts on the pads with a mask having a plurality of through hole reservoirs and align the reservoirs in the mask to be substantially concentric with the distal ends. Injecting liquid solder into the reservoirs and allowing it to cool provides solidified solder on the distal ends, which after mask removal produces a solder bumped substrate which we position on a wafer to leave a gap between the wafer and the substrate. The wafer has electrically conductive sites on the surface for soldering to the posts. Abutting the sites and the solder bumped posts followed by heating joins the wafer and substrate. The gap is optionally filled with a material comprising an underfill.

First claim

Opening claim text (preview).

We claim: 1. In a method comprising forming a semiconductor flip chip from a wafer having solderable electrical conducting sites and a substrate having electrical connecting pads and electrically conductive posts operatively associated with said pads and extending away from said pads to terminate in distal ends, the steps comprising solder bumping said distal ends through openings in a solder mask by injection molding solder onto said distal ends to produce a solder bumped substrat…

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What does patent US8945995B2 cover?
A method comprises forming semiconductor flip chip interconnects having electrical connecting pads and electrically conductive posts terminating in distal ends operatively associated with the pads. We solder bump the distal ends by injection molding, mask the posts on the pads with a mask having a plurality of through hole reservoirs and align the reservoirs in the mask to be substantially conc…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W90/701. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).