Manufacture of face-down microelectronic packages

Patent metadata

Field	Value
Publication number	US-8945987-B2
Application number	US-201313837724-A
Country	US
Kind code	B2
Filing date	Mar 15, 2013
Priority date	Mar 15, 2013
Publication date	Feb 3, 2015
Grant date	Feb 3, 2015

Abstract

In a high volume method for manufacturing a microelectronic package, a spacer element and a first die, i.e., microelectronic element, can be attached face-down to a surface of a substrate, contacts on the first die facing a first through opening of the substrate. Then, a second die can be attached face-down atop the first die and the spacer element, contacts on the second die disposed beyond an edge of the first die and facing a second through opening in the substrate. Electrical connections can then be formed between each of the first and second dies and the substrate. The first and second dies can be transferred from positions of a single diced wafer which are selected to maximize compound speed bin yield of the microelectronic package.

First claim

The invention claimed is:

1. A method of manufacturing a microelectronic package, comprising:
(a) attaching first major surfaces of a first microelectronic element and a spacer element, respectively, to a first surface of a substrate such that a plurality of contacts at the first major surface of the first microelectronic element are aligned with a first opening extending through the substrate;
(b) then attaching a second microelectronic element atop second major surfaces of the…

Assignees

• Invensas Corp

Inventors

• Crisp Richard Dewitt
• Zohni Wael
• Haba Belgacem

Classifications

• H10W90/754

  Electricity · mapped topic

• H10W90/734

  Electricity · mapped topic

• H10W90/732

  Electricity · mapped topic

• H10W90/24

  Electricity · mapped topic

• H10W74/117

  Electricity · mapped topic