Light emitting device grown on a relaxed layer

US8945975B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8945975-B2
Application numberUS-201414178983-A
CountryUS
Kind codeB2
Filing dateFeb 12, 2014
Priority dateMay 19, 2010
Publication dateFeb 3, 2015
Grant dateFeb 3, 2015

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Abstract

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In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer is disposed between the second semiconductor layer and the light emitting layer. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the third semiconductor layer is no more than 1%. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the second semiconductor layer is at least 1%. The third semiconductor layer is at least partially relaxed.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method comprising: growing a first III-nitride semiconductor layer over a growth substrate; growing a second semiconductor layer; growing a third semiconductor layer; and growing a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region; wherein the second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer; the third semic…

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What does patent US8945975B2 cover?
In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The th…
Who is the assignee on this patent?
Koninkl Philips Nv, Philips Lumileds Lighting Co
What technology area does this patent fall under?
Primary CPC classification H10H20/815. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).