DMI redundancy in multiple processor computer systems

US8943360B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8943360-B2
Application numberUS-201313954266-A
CountryUS
Kind codeB2
Filing dateJul 30, 2013
Priority dateDec 22, 2009
Publication dateJan 27, 2015
Grant dateJan 27, 2015

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  2. Abstract

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Abstract

Official abstract text for this publication.

In accordance with various aspects of the disclosure, a method and apparatus are disclosed that includes aspects of monitoring a first processor of a computer by a monitoring module for a first processor instability; determining if the first processor is stable based on the monitored first processor instability; routing operational priority to a second processor of the computer through a multiplexer module if the first processor is determined not to be stable, wherein a first interface of the first processor and a second interface of the second processor are in communication with the multiplexer module and wherein the first processor and the second processor are in communication by a processor interconnect; and operating the computer using the second processor.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method comprising: monitoring, by a monitoring module, one or more parameters related to a computer, the one or more parameters comprising a power mode; monitoring, by the monitoring module, for instability of a second processor, wherein the instability comprises a pre-boot instability and a post-boot instability in the computer, and designating, by a controller, a first processor as a boot processor based at least on the monitored power mode and…

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What does patent US8943360B2 cover?
In accordance with various aspects of the disclosure, a method and apparatus are disclosed that includes aspects of monitoring a first processor of a computer by a monitoring module for a first processor instability; determining if the first processor is stable based on the monitored first processor instability; routing operational priority to a second processor of the computer through a multip…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F11/1417. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).