Shift register

US8942339B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8942339-B2
Application numberUS-201314034150-A
CountryUS
Kind codeB2
Filing dateSep 23, 2013
Priority dateMar 12, 2007
Publication dateJan 27, 2015
Grant dateJan 27, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A shift register is disclosed, which can prevent malfunctioning of device by decreasing the load on a discharging voltage source line, and can decrease a size of stage. The shift register comprises a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises a pull-up switching unit controlled based on a signal state of node, and connected between the output terminal and any one among a plurality of clock transmission lines to transmit the clock pulses provided with sequential phase differences; and a node controller to control the signal state of node, and to discharge the node by using the clock pulse from any one among the plurality of clock transmission line.

First claim

Opening claim text (preview).

The invention claimed is: 1. A shift register comprising a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises: a pull-up switching unit controlled based on a signal state of a node, and connected between an output terminal and any one among a plurality of clock transmission lines to transmit clock pulses provided with sequential phase differences; and a node controller to control the signal state of th…

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What does patent US8942339B2 cover?
A shift register is disclosed, which can prevent malfunctioning of device by decreasing the load on a discharging voltage source line, and can decrease a size of stage. The shift register comprises a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises a pull-up switching unit controlled based on a signal state of node,…
Who is the assignee on this patent?
Lg Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G11C19/28. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).