Array substrate, display panel, spliced display panel and display driving method
US-12033571-B2 · Jul 9, 2024 · US
US8942339B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8942339-B2 |
| Application number | US-201314034150-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 23, 2013 |
| Priority date | Mar 12, 2007 |
| Publication date | Jan 27, 2015 |
| Grant date | Jan 27, 2015 |
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A shift register is disclosed, which can prevent malfunctioning of device by decreasing the load on a discharging voltage source line, and can decrease a size of stage. The shift register comprises a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises a pull-up switching unit controlled based on a signal state of node, and connected between the output terminal and any one among a plurality of clock transmission lines to transmit the clock pulses provided with sequential phase differences; and a node controller to control the signal state of node, and to discharge the node by using the clock pulse from any one among the plurality of clock transmission line.
Opening claim text (preview).
The invention claimed is: 1. A shift register comprising a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises: a pull-up switching unit controlled based on a signal state of a node, and connected between an output terminal and any one among a plurality of clock transmission lines to transmit clock pulses provided with sequential phase differences; and a node controller to control the signal state of th…
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