Method for measuring surface parameter of copper foil, and method for sorting copper foil
US-2024418504-A1 · Dec 19, 2024 · US
US8942006B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8942006-B2 |
| Application number | US-201313745780-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 19, 2013 |
| Priority date | Jan 19, 2013 |
| Publication date | Jan 27, 2015 |
| Grant date | Jan 27, 2015 |
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A printed circuit board (PCB) stackup includes conductive layers and insulating layers interleaved among the conductive layers. The conductive layers include one or more power layers, one or more ground layers, one or more high-frequency layers, and one or more low-frequency layers. One or more first signals having one or more first frequencies greater than a first threshold are communicated over the high-frequency layers. One or more second signals having one or more second frequencies less than a second threshold are communicated over the low-frequency layers. Each second frequency is less than each first frequency. The insulating layers include one or more core layers and one or more prepreg layers arranged in alternating fashion. Each insulating layer adjacent to any high-frequency layer has a first material type. Each insulating layer not adjacent to any high-frequency layer has a second material type different than the first material type.
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I claim: 1. A printed circuit board (PCB) stack up comprising: a plurality of conductive layers comprising one or more power layers, one or more ground layers, one or more high-frequency layers over which one or more first signals having one or more first frequencies greater than a first threshold specifying a minimum high frequency are communicated, and one or more low-frequency layers over which one or more second signals having one or more second frequencies less than a second…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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