Semiconductor device

US8941963B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8941963-B2
Application numberUS-201313908613-A
CountryUS
Kind codeB2
Filing dateJun 3, 2013
Priority dateJun 7, 2012
Publication dateJan 27, 2015
Grant dateJan 27, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A first overcurrent detection unit detects whether a drain-source voltage of an output transistor is greater than or equal to a first reference value and outputs a first detection signal. A second overcurrent detection unit detects whether an output current passing through the output transistor is greater than or equal to a second reference value and outputs a second detection signal. When receiving the first detection signal indicating that the drain-source voltage is greater than or equal to the first reference value, a latch circuit latches the second detection signal; when receiving the first detection signal indicating that the drain-source voltage is smaller than the first reference value, the latch circuit outputs the second detection signal without latching it. Based on the output of the latch circuit, the drive circuit controls the output transistor to either turn it off or turn it on and off alternately.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: an output transistor coupled between a first terminal and a second terminal; a first overcurrent detection unit configured to detect whether a drain-source voltage of the output transistor is greater than or equal to a first reference value and to output a first detection signal; a second overcurrent detection unit configured to detect whether an output current is a second reference value, the output current being a current passing through the output transistor, and to output a second detection signal; a latch circuit configured to, when receiving the first detection signal indicating that the drain-source voltage is greater than or equal to the first reference value, latch the second detection signal; and a drive circuit configured to, based on an output of the latch circuit, control the output transistor to turn off the output transistor, wherein, when the latch circuit receives the first detection signal indicating that the drain-source voltage is smaller than the first reference value, the latch circuit outputs the second detection signal without latching the second detection signal, and based on the output of the latch circuit, the drive circuit controls the output transistor to turn on or off the output transistor. 2. The semiconductor device according to claim 1 , wherein the latch circuit comprises: a latch unit configured to be enabled by the first detection signal and to latch the second detection signal; and an AND circuit configured to output an AND of an output of the latch unit and the second detection signal. 3. The semiconductor device according to claim 1 , wherein the first overcurrent detection unit comprises: a diode having a cathode coupled to the first terminal; a first resistor coupled between an anode of the diode and the second terminal; a second resistor coupled to the first terminal; and a transistor coupled between the second resistor and the second terminal, having a gate coupled between the diode and the first resistor, and configured to be turned on when the drain-source voltage is greater than or equal to the first reference value, and wherein the first overcurrent detection unit outputs a potential between the second resistor and the transistor, as the first detection signal. 4. The semiconductor device according to claim 1 , wherein the second overcurrent detection unit comprises: a sense transistor coupled in parallel to the output transistor with respect to the first terminal, respective gates of the sense transistor and the output transistor being coupled together; a sense resistor coupled between the sense transistor and the second terminal; a current source coupled in parallel to the sense transistor with respect to the first terminal; a transistor coupled between the current source and the second terminal, a gate of the transistor being coupled between the sense transistor and the sense resistor; and a comparator configured to compare a potential between the current source and the transistor with a predetermined potential and to output a comparison result as the second detection signal. 5. The semiconductor device according to claim 1 , wherein the second reference value includes a first second reference value and a second reference value greater than the first second reference value, and wherein when the drain-source voltage is greater than the first reference value, the second overcurrent detection unit detects whether the output current is greater than or equal to the first second reference value and outputs the second detection signal, and wherein when the drain-source voltage is smaller than the first reference value, the second overcurrent detection unit detects whether the output current is greater than or equal to the second reference value and outputs the second detection signal. 6. The semiconductor device according to claim 5 , wherein the second overcurrent detection unit comprises: a sense transistor coupled in parallel to the output transistor with respect to the first terminal, respective gates of the sense transistor and the output transistor being coupled together; a sense resistor coupled between the sense transistor and the second terminal; a first current source coupled in parallel to the sense transistor with respect to the first terminal; a second current source coupled in parallel to the sense transistor with respect to the first terminal and configured to function based on a signal obtained by inverting the first detection signal; a transistor coupled among the first and second current sources and the second terminal, a gate of the transistor being coupled between the sense transistor and the sense resistor; and a comparator configured to compare a potential between the first and second current sources and the transistor with a predetermined potential and to output a comparison result as the second detection signal. 7. The semiconductor device according to claim 5 , wherein the second overcurrent detection unit comprises: a sense transistor coupled in parallel to the output transistor with respect to the first terminal, respective gates of the sense transistor and the output transistor being coupled together; a sense resistor coupled between the sense transistor and the second terminal; a current source coupled in parallel to the sense transistor with respect to the first terminal; a transistor coupled between the current source and the second terminal, a gate of the transistor being coupled between the sense transistor and the sense resistor; a third transistor coupled between the current source and the second terminal, a gate of the third transistor being coupled between the sense transistor and the sense resistor, the third transistor being configured to function when the first detection signal is output; and a comparator configured to compare a potential between the current source, and the transistor and third transistor with a predetermined potential and to output a comparison result as the second detection signal. 8. The semiconductor device according to claim 1 , further comprising a quick interrupt control unit configured to, in response to a source voltage of the output transistor becoming less than or equal to a predetermined threshold, quickly discharging gate charge of the output transistor. 9. The semiconductor device according to claim 1 , wherein a load is coupled to one of the first terminal and the second terminal. 10. An electrical system comprising: a power source; a load; a microcomputer; and the semiconductor device according to claim 1 , the semiconductor device being either coupled to the power source, the load, and the microcomputer or coupled to the load coupled to the power source and to the microcomputer and configured to control power supply from the power source to the load based on the control of the microcomputer. 11. A method for operating a semiconductor device, comprising: detecting whether a drain-source voltage of an output transistor coupled between a first terminal and a second terminal is greater than or equal to a first reference value and outputting a first detection signal; detecting whether an output current is greater than or equal to a second reference value, the output current being a current passing through the output transistor, and outputting a second detection signal; when receiving the first detection signal indicating that the drain-source voltage is greater than or equal to the first reference value, latching the second detection signal; based on the latched second detection signal, controlling the output transistor to turn off the output transistor; w

Assignees

Inventors

Classifications

  • H02H3/08Primary

    responsive to excess current (responsive to abnormal temperature caused by excess current H02H5/04) · CPC title

  • H02H3/087Primary

    for DC applications · CPC title

  • in field-effect transistor switches · CPC title

  • by feedback from the output to the control circuit · CPC title

  • for batteries; for accumulators · CPC title

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Frequently asked questions

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What does patent US8941963B2 cover?
A first overcurrent detection unit detects whether a drain-source voltage of an output transistor is greater than or equal to a first reference value and outputs a first detection signal. A second overcurrent detection unit detects whether an output current passing through the output transistor is greater than or equal to a second reference value and outputs a second detection signal. When rece…
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H02H3/08. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).