Liquid crystal display with dummy stages in shift register and its clock signal operation

US8941577B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8941577-B2
Application numberUS-201113879992-A
CountryUS
Kind codeB2
Filing dateNov 2, 2011
Priority dateNov 10, 2010
Publication dateJan 27, 2015
Grant dateJan 27, 2015

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Abstract

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A first gate driver that drives a gate bus line corresponding to a first sub-pixel section and a second gate driver that drives a gate bus line corresponding to a second sub-pixel section are monolithically formed inside a panel. A shift register inside the second gate driver has a configuration where stages corresponding to respective rows and dummy stages each disposed for each row, are connected in series with one another. In such a configuration, a frequency of a clock signal for controlling an operation of the second gate driver is made twice as large as a frequency of a clock signal for controlling an operation of the first gate driver.

First claim

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The invention claimed is: 1. A liquid crystal display device, comprising: a display section; a pixel section which contains a first sub-pixel section including a first switching element, a first pixel electrode connected to a first conduction terminal of the first switching element, and a first pixel capacitance that stores an electric charge in accordance with a potential of the first pixel electrode, and a second sub-pixel section including a second switching element, a second…

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What does patent US8941577B2 cover?
A first gate driver that drives a gate bus line corresponding to a first sub-pixel section and a second gate driver that drives a gate bus line corresponding to a second sub-pixel section are monolithically formed inside a panel. A shift register inside the second gate driver has a configuration where stages corresponding to respective rows and dummy stages each disposed for each row, are conne…
Who is the assignee on this patent?
Ohara Masanori, Sharp Kk
What technology area does this patent fall under?
Primary CPC classification G09G3/3677. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).