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Differential circuit compensating gain enhancement due to self heating of transistors
US8941440B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8941440-B2 |
| Application number | US-201313778320-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 27, 2013 |
| Priority date | Mar 2, 2012 |
| Publication date | Jan 27, 2015 |
| Grant date | Jan 27, 2015 |
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Abstract
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A differential circuit with a function to compensate the gain enhancement due to the self-heating of the transistor is disclosed. The differential circuit includes an equalizer unit coupled with one of paired transistors. The other of the paired transistor receives the input signal to be amplified. The base level, or the base-emitter bias, is oppositely modulated by the input signal through the common emitter, which causes the modification of the base current. The equalizer unit reduces the variation of the base level only in low frequencies where the self-heating effect of the transistor appears.
First claim
Opening claim text (preview).
We claim: 1. A differential circuit for receiving input signals complementary to each other and outputting output signals complementary to each other, the differential circuit comprising: a first differential unit including a pair of transistors, one of the transistors in the first differential unit receiving one of the input signals, wherein at least an other of the transistors in the first differential unit shows a gain enhancement in frequencies lower than a transition frequenc…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H03F3/4508Primary
Electricity · mapped topic
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- What does patent US8941440B2 cover?
- A differential circuit with a function to compensate the gain enhancement due to the self-heating of the transistor is disclosed. The differential circuit includes an equalizer unit coupled with one of paired transistors. The other of the paired transistor receives the input signal to be amplified. The base level, or the base-emitter bias, is oppositely modulated by the input signal through the…
- Who is the assignee on this patent?
- Sumitomo Electric Industries
- What technology area does this patent fall under?
- Primary CPC classification H03F3/4508. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).