Skip mode method and system for a current mode switching converter

US8941368B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8941368-B2
Application numberUS-201313789210-A
CountryUS
Kind codeB2
Filing dateMar 7, 2013
Priority dateMar 7, 2013
Publication dateJan 27, 2015
Grant dateJan 27, 2015

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Abstract

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A method and system to inhibit the switching of a current mode switching converter having high and low side switching elements coupled to an output inductor, the other end of which is coupled to an output node, and operated with respective modulated switching signals to regulate an output voltage Vout produced at the node. A current I C that varies with the difference between a reference voltage and a voltage proportional to Vout is compared with and a current I DETECT — PEAK which varies with the current conducted by the high side switching element; the result of the comparison of I C and I DETECT — PEAK is used to control the regulation of Vout during normal operation. Current I C is also compared with a current I DETECT — VALLEY which varies with the current conducted by the low side switching element. When I DETECT — VALLEY >I C , a ‘skip mode’ is triggered during which the switching signals are inhibited.

First claim

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We claim: 1. A method of inhibiting the switching of a current mode switching converter having high and low side switching elements coupled to an output inductor, the other end of which is coupled to an output node, and operated with respective modulated switching signals to regulate a desired output voltage Vout produced at said output node, said method comprising: comparing a signal X that varies with the difference voltage V COMP between a reference voltage and a voltage propo…

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What does patent US8941368B2 cover?
A method and system to inhibit the switching of a current mode switching converter having high and low side switching elements coupled to an output inductor, the other end of which is coupled to an output node, and operated with respective modulated switching signals to regulate an output voltage Vout produced at the node. A current I C that varies with the difference between a reference volta…
Who is the assignee on this patent?
Analog Devices Technology
What technology area does this patent fall under?
Primary CPC classification G05F1/46. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).