Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Semiconductor device
US8941237B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8941237-B2 |
| Application number | US-201313920520-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 18, 2013 |
| Priority date | Jul 29, 2010 |
| Publication date | Jan 27, 2015 |
| Grant date | Jan 27, 2015 |
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Abstract
Official abstract text for this publication.
A device includes a substrate, a semiconductor chip, first and second pads, and a first wiring layer. The substrate includes first and second surfaces. The semiconductor chip includes third and fourth surfaces. The third surface faces toward the first surface. The first and second pads are provided on the third surface. The first and second pads are connected to each other. The first wiring layer is provided on the second surface of the substrate. The first wiring layer is connected to the first pad.
First claim
Opening claim text (preview).
What is claimed is: 1. A device comprising: a substrate including a bonding pad thereon; a semiconductor chip including first and second electrode pads formed on a surface of the semiconductor chip, the semiconductor chip being mounted over the substrate; an opening in the substrate, the first and second electrode pads facing the opening; a first connector electrically coupling the first electrode pad to the second electrode pad; and a second connector including a first en…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8941237B2 cover?
- A device includes a substrate, a semiconductor chip, first and second pads, and a first wiring layer. The substrate includes first and second surfaces. The semiconductor chip includes third and fourth surfaces. The third surface faces toward the first surface. The first and second pads are provided on the third surface. The first and second pads are connected to each other. The first wiring lay…
- Who is the assignee on this patent?
- Elpida Memory Inc, Ps4 Luxco Sarl
- What technology area does this patent fall under?
- Primary CPC classification H10W70/68. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).