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US-2024297070-A1 · Sep 5, 2024 · US
Methods for fabricating integrated circuits utilizing silicon nitride layers
US8940650B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8940650-B2 |
| Application number | US-201313787521-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 6, 2013 |
| Priority date | Mar 6, 2013 |
| Publication date | Jan 27, 2015 |
| Grant date | Jan 27, 2015 |
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Abstract
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A method of fabricating an integrated circuit includes the steps of providing a semiconductor substrate comprising a semiconductor device disposed thereon and depositing a first silicon nitride layer over the semiconductor substrate and over the semiconductor device using a first deposition process. The first deposition process is a plasma-enhanced chemical vapor deposition (PECVD) process that operates over a plurality of cycles, each cycle having a first time interval and a second time interval. The PECVD process includes the steps of generating a plasma with a power source during the first time interval, the plasma comprising reactive ionic and radical species of a silicon-providing gas and a nitrogen-providing gas, and discontinuing generating the plasma during the second time interval immediately subsequent to the first time interval. The method further includes depositing a second silicon nitride layer over the first silicon nitride layer after the plurality of cycles.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of fabricating an integrated circuit comprising the steps of: providing a semiconductor substrate comprising a semiconductor device disposed thereon; depositing a first silicon nitride layer over the semiconductor substrate and over the semiconductor device using a first deposition process, wherein the first deposition process is a plasma-enhance chemical vapor deposition (PECVD) process that operates over a plurality of cycles, each cycle having…
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Classifications
Electricity · mapped topic
- H10P14/6336Primary
Electricity · mapped topic
- H01L21/02266Primary
Electricity · mapped topic
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- What does patent US8940650B2 cover?
- A method of fabricating an integrated circuit includes the steps of providing a semiconductor substrate comprising a semiconductor device disposed thereon and depositing a first silicon nitride layer over the semiconductor substrate and over the semiconductor device using a first deposition process. The first deposition process is a plasma-enhanced chemical vapor deposition (PECVD) process that…
- Who is the assignee on this patent?
- Globalfoundries Inc
- What technology area does this patent fall under?
- Primary CPC classification H10P14/6336. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).