Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US8940581B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8940581-B2 |
| Application number | US-201113298140-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 16, 2011 |
| Priority date | Jun 10, 2008 |
| Publication date | Jan 27, 2015 |
| Grant date | Jan 27, 2015 |
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Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a packaged microelectronic device can include a support member, a first die attached to the support member, and a second die attached to the first die in a stacked configuration. The device can also include an attachment feature between the first and second dies. The attachment feature can be composed of a dielectric adhesive material. The attachment feature includes (a) a single, unitary structure covering at least approximately all of the back side of the second die, and (b) a plurality of interconnect structures electrically coupled to internal active features of both the first die and the second die.
Opening claim text (preview).
We claim: 1. A method for manufacturing stacked microelectronic devices, the method comprising: placing an attachment structure on a back side of a first microelectronic die, wherein the attachment structure includes a plurality of openings at least partially aligned with back side portions of electrically conductive through-substrate interconnects in the first die, and wherein the attachment structure further includes a plurality of conductive couplers formed in at least a portio…
Electricity · mapped topic
Electricity · mapped topic
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