Data and error correction code mixing device and method

Patent metadata

Field	Value
Publication number	US-8938657-B2
Application number	US-201414153703-A
Country	US
Kind code	B2
Filing date	Jan 13, 2014
Priority date	Aug 15, 2008
Publication date	Jan 20, 2015
Grant date	Jan 20, 2015

Abstract

Memory devices and methods are described such as those that mix data and associated error correction code blocks between multiple memory device locations. Examples include mixing between multiple memory blocks, mixing between memory pages, mixing between memory chips and mixing between memory modules. In selected examples, memory blocks and associated error correction code are mixed between multiple levels of memory device hierarchy.

First claim

What is claimed is:

1. A method, comprising:
generating a first error correction code associated with a first data block;
generating a second error correction code associated with a second data block;
respectively breaking the first data block and the associated first error correction code up into first and second portions; and
writing the first and the second portions between at least two different memory storage locations, wherein writing the first and the second portions…

Assignees

• Micron Technology Inc

Inventors

• Radke William Henry

Classifications

• G06F11/1008

  Physics · mapped topic

• G11C29/00

  Physics · mapped topic

• G06F11/1012 Primary

  Physics · mapped topic

• G06F11/1072

  Physics · mapped topic

• H03M13/05 Primary

  Electricity · mapped topic