Method and system for performing analog complex vector-matrix multiplication
US-10878317-B2 · Dec 29, 2020 · US
US8938486B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8938486-B2 |
| Application number | US-201213431921-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 27, 2012 |
| Priority date | Mar 31, 2011 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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A complex divider utilized for dividing a first complex number by a second complex number to generate a computing result includes a computing unit and a dividing unit. The computing unit is utilized for receiving the first complex value and the second complex value, generating a third complex value according to the first complex value and the second complex value, and generating a real number according to the second complex value. The dividing unit is coupled to the computing unit, and is utilized for receiving the third complex value and the real number and dividing the third complex value by the real number to obtain the computing result.
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What is claimed is: 1. A complex divider, for dividing a first complex number by a second complex number to generate a computing result, comprising: a computing circuit, for receiving the first complex number and the second complex number, generating a third complex number according to the first complex number and the second complex number, and generating a real number according to the second complex number, wherein a phase difference between the third complex number and the first…
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