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Silicon-based opto-electronic integrated circuit with reduced polarization dependent loss
US8938142B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8938142-B2 |
| Application number | US-201113324251-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 13, 2011 |
| Priority date | Dec 15, 2010 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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Abstract
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A silicon-based opto-electronic circuit is formed to exhibit reduced polarization-dependent loss by strategically placing the photodetecting device as close as possible to the entry point of the optical signal into the opto-electronic circuit arrangement. While the incoming optical signal will include both TE and TM modes, by minimizing the length of the optical waveguide path along which the signal must propagate before reaching a photodetector, the attenuation associated with TM mode signal will be negligible.
First claim
Opening claim text (preview).
What is claimed is: 1. A silicon-based opto-electronic circuit formed on a silicon substrate, the circuit comprising: an optical waveguide of a predetermined length separating an input of the optical waveguide from an output of the optical waveguide, the optical waveguide is formed in the silicon substrate and configured to receive an optical signal at the input of the optical waveguide, wherein the optical signal exhibits both transverse electric (TE) and transverse magnetic (TM)…
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Physics · mapped topic
- G02B6/4246Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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- What does patent US8938142B2 cover?
- A silicon-based opto-electronic circuit is formed to exhibit reduced polarization-dependent loss by strategically placing the photodetecting device as close as possible to the entry point of the optical signal into the opto-electronic circuit arrangement. While the incoming optical signal will include both TE and TM modes, by minimizing the length of the optical waveguide path along which the s…
- Who is the assignee on this patent?
- Shastri Kalpendu, Nering Raymond, Cisco Tech Inc
- What technology area does this patent fall under?
- Primary CPC classification G02B6/4246. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jan 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).