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Device and method for direct mixing of pulse density modulation (PDM) signals
US8937515B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8937515-B2 |
| Application number | US-201314060626-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 23, 2013 |
| Priority date | Nov 15, 2012 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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Abstract
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A device for mixing multiple (N) pulse density modulated (PDM) bit streams of a bit rate, the device comprises an input logic, an error accumulation circuit, an error correction circuit and an adder of more than N bits; wherein the device is arranged to output an output PDM bit stream that represents a mixture of the multiple input PDM bit streams; wherein the output PDM bit stream comprises a plurality of output PDM bits, wherein a certain output PDM bit of a plurality of output PDM bits that form the output PDM bit stream is generated during a certain clock cycle; wherein the input logic is arranged to select, during each fraction of the certain clock cycle, a current bit of a selected PDM bit stream, wherein different PDM bit streams are selected during different fragments of the certain clock cycle; wherein the error accumulation circuit is arranged to store intermediate values during a first fraction till a penultimate fraction of the certain clock signal and to store a last value during a last fraction of the certain clock signal.
First claim
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I claim: 1. A device for mixing multiple (N) pulse density modulated (PDM) bit streams of a bit rate, the device comprises an input logic, an error accumulation circuit, a error correction circuit and an adder of more than N bits; wherein the device is arranged to output an output PDM bit stream that represents a mixture of the multiple input PDM bit streams; wherein the output PDM bit stream comprises a plurality of output PDM bits, wherein a certain output PDM bit of a plurality…
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- What does patent US8937515B2 cover?
- A device for mixing multiple (N) pulse density modulated (PDM) bit streams of a bit rate, the device comprises an input logic, an error accumulation circuit, an error correction circuit and an adder of more than N bits; wherein the device is arranged to output an output PDM bit stream that represents a mixture of the multiple input PDM bit streams; wherein the output PDM bit stream comprises a …
- Who is the assignee on this patent?
- Haiut Moshe, Dsp Group Ltd
- What technology area does this patent fall under?
- Primary CPC classification H03M1/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).