Increasing output amplitude of a voltage-mode driver in a low supply voltage technology
US-2015381150-A1 · Dec 31, 2015 · US
Output driver, devices having the same, and ground termination
US8937490B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8937490-B2 |
| Application number | US-201213659543-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 24, 2012 |
| Priority date | Oct 24, 2011 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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Abstract
Official abstract text for this publication.
An integrated circuit comprising an output driver including an output terminal, and a receiving circuit including a termination resistor connected between the output terminal and a ground. The output driver comprising a first NMOS transistor configured to pull up a voltage of the output terminal to a pull-up voltage in response to a pull-up signal, and a second NMOS transistor configured to pull down the output terminal to a ground voltage in response to a pull-down signal.
First claim
Opening claim text (preview).
What is claimed is: 1. An integrated circuit (IC) comprising: an output driver including; an output terminal, a first n-type metal-oxide semiconductor (NMOS) transistor configured to pull up a voltage of the output terminal to a pull-up voltage, in response to a pull-up signal, and a second NMOS transistor configured to pull down the voltage of the output terminal to a ground voltage, in response to a pull-down signal; and a receiving circuit including, a termination res…
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Classifications
Electricity · mapped topic
- H04L25/028Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8937490B2 cover?
- An integrated circuit comprising an output driver including an output terminal, and a receiving circuit including a termination resistor connected between the output terminal and a ground. The output driver comprising a first NMOS transistor configured to pull up a voltage of the output terminal to a pull-up voltage in response to a pull-up signal, and a second NMOS transistor configured to pul…
- Who is the assignee on this patent?
- Moon David, Bae Yong Cheol, Ahn Min Su, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification H04L25/028. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).