Circuits and Techniques for Detecting an Open Pin Condition of an Integrated Circuit
US-2015362550-A1 · Dec 17, 2015 · US
US8937486B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8937486-B2 |
| Application number | US-201313939408-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 11, 2013 |
| Priority date | Oct 1, 2009 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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A method for testing a TSV comprises charging a through-silicon-via under test to a first predetermined voltage level charging a capacitance device to a second predetermined voltage level; performing charge-sharing between the through-silicon-via and the capacitance device; and determining that the through-silicon-via under test is not faulty if the voltage level of the through-silicon-via after the charge-sharing step is within a predetermined range.
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What is claimed is: 1. A method for testing a through-silicon-via, comprising the steps of: charging a through-silicon-via under test to a first predetermined voltage level; charging a capacitance device to a second predetermined voltage level; performing charge-sharing between the through-silicon-via and the capacitance device; and determining that the through-silicon-via under test is not faulty if the voltage level of the through-silicon-via after the charge-sharing step…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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