3-D nonvolatile memory device, memory system, and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-8937348-B2
Application number	US-201213601641-A
Country	US
Kind code	B2
Filing date	Aug 31, 2012
Priority date	Dec 19, 2011
Publication date	Jan 20, 2015
Grant date	Jan 20, 2015

Abstract

A three dimensional (3-D) nonvolatile memory device includes a first pipe gate layer, a second pipe gate disposed over the first pipe gate layer, word lines formed over the second pipe gate layer, memory channel layers configured to penetrate the word lines, a pipe channel layer formed in the first pipe gate layer, where the pipe channel layer is to come in contact with the bottom surface of the second pipe gate layer and couple the lower ends of the memory channel layers, a memory layer configured to surround the pipe channel layer and the memory channel layers, and a first gate insulating layer interposed between the first pipe gate layer and the memory layer.

First claim

What is claimed is:

1. A three dimensional (3-D) nonvolatile memory device, comprising:
a first pipe gate layer;
a second pipe gate disposed over the first pipe gate layer and contacting the first pipe gate layer;
word lines formed over the second pipe gate layer;
memory channel layers configured to penetrate the word lines;
a pipe channel layer formed in the first pipe gate layer and coupling lower ends of the memory channel layers;
a memory layer configured to surround…

Assignees

• Jeon Yoo Nam
• Sk Hynix Inc

Inventors

• Jeon Yoo Nam

Classifications

• H10D30/693

  Electricity · mapped topic

• H10D30/0413 Primary

  Electricity · mapped topic

• H10D88/00

  Electricity · mapped topic

• H10B43/20

  Electricity · mapped topic

• H10B43/27 Primary

  Electricity · mapped topic