Semiconductor device
US-12057459-B2 · Aug 6, 2024 · US
Semiconductor device and method of manufacturing the same
US8937313B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8937313-B2 |
| Application number | US-201213477802-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 22, 2012 |
| Priority date | Jan 10, 2012 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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Abstract
Official abstract text for this publication.
A semiconductor device and a method of manufacturing the same are disclosed. In one embodiment, the semiconductor device includes a substrate, a first silicon nitride layer formed over the substrate, a first silicon oxide layer formed directly on the first silicon nitride layer and having a thickness of about 1000 Å or less, and a hydrogenated polycrystalline silicon layer formed directly on the first silicon oxide layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a substrate; a first buffer layer formed over the substrate, wherein the first buffer layer contains hydrogen; and an active layer formed on the first buffer layer and containing polycrystalline silicon and hydrogen, wherein the concentration of the hydrogen contained in the active layer is about 1 atomic percent (at. %) or more, wherein the device further comprises a second buffer layer formed between and contacting…
Assignees
Inventors
Classifications
Electricity · mapped topic
- H10D30/6758Primary
Electricity · mapped topic
Electricity · mapped topic
- H10D86/411Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8937313B2 cover?
- A semiconductor device and a method of manufacturing the same are disclosed. In one embodiment, the semiconductor device includes a substrate, a first silicon nitride layer formed over the substrate, a first silicon oxide layer formed directly on the first silicon nitride layer and having a thickness of about 1000 Å or less, and a hydrogenated polycrystalline silicon layer formed directly on th…
- Who is the assignee on this patent?
- Chung Yun-Mo, Lee Ki-Yong, Seo Jin-Wook, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification H10D30/6758. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).