Techniques for generating three dimensional structures

US8937019B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8937019-B2
Application numberUS-201313855173-A
CountryUS
Kind codeB2
Filing dateApr 2, 2013
Priority dateApr 3, 2012
Publication dateJan 20, 2015
Grant dateJan 20, 2015

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Techniques for forming a three dimensional (3D) feature on a substrate are disclosed. In one exemplary embodiment, the technique may be realized as a method comprising: forming a resist structure on the substrate, the resist structure having a first resist portion with a first thickness, a second resist portion with a second thickness, and a third resist portion with a third thickness, where the first thickness may be less than the second thickness, and where the second thickness may be less than the third thickness; implanting charged particles into the substrate through the first and second resist portions and forming an implanted region in the substrate; and etching the substrate to form the 3D feature on the substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of forming a three dimensional (3D) feature on a substrate, the method comprising: forming a resist structure on the substrate, the resist structure having a first resist portion with a first thickness, a second resist portion with a second thickness, and a third resist portion with a third thickness, wherein the first thickness is less than the second thickness, and wherein the second thickness is less than the third thickness; implanting charged…

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What does patent US8937019B2 cover?
Techniques for forming a three dimensional (3D) feature on a substrate are disclosed. In one exemplary embodiment, the technique may be realized as a method comprising: forming a resist structure on the substrate, the resist structure having a first resist portion with a first thickness, a second resist portion with a second thickness, and a third resist portion with a third thickness, where th…
Who is the assignee on this patent?
Varian Semiconductor Equipment
What technology area does this patent fall under?
Primary CPC classification G03F7/0002. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).