Semiconductor device and method for forming the same
US-2024395669-A1 · Nov 28, 2024 · US
Method for forming vias in a substrate
US8937015B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8937015-B2 |
| Application number | US-201113085311-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 12, 2011 |
| Priority date | Dec 4, 2007 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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- Title
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Abstract
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The present invention relates to a method for forming a via in a substrate which includes the flowing steps of: (a) providing a substrate having a first surface and a second surface; (b) forming an accommodating groove and a plurality of pillars on the first surface of the substrate, the accommodating groove having a side wall and a bottom wall, the pillars remaining on the bottom wall of the accommodating groove; (c) forming a first insulating material in the accommodating groove and between the pillars; (d) removing the pillars so as to form a plurality of grooves in the first insulating material; and (e) forming a first conductive metal in the grooves. As a result, thicker insulating material can be formed in the via, and the thickness of the insulating material in the via is even.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for forming a via in a substrate, comprising: (a) providing the substrate having a first surface and a second surface; (b) forming an accommodating groove and a plurality of pillars on the first surface of the substrate, the accommodating groove having a side wall and a bottom wall, the pillars remaining on the bottom wall of the accommodating groove, wherein the pillars are solid cylinders, and there is a completely empty space between the pillar…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8937015B2 cover?
- The present invention relates to a method for forming a via in a substrate which includes the flowing steps of: (a) providing a substrate having a first surface and a second surface; (b) forming an accommodating groove and a plurality of pillars on the first surface of the substrate, the accommodating groove having a side wall and a bottom wall, the pillars remaining on the bottom wall of the a…
- Who is the assignee on this patent?
- Wang Meng-Jen, Wu Chung-Hsi, Advanced Semiconductor Eng
- What technology area does this patent fall under?
- Primary CPC classification H10W20/023. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).