Tracing using configurable reflection chaining
US-2024411664-A1 · Dec 12, 2024 · US
US8935574B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8935574-B2 |
| Application number | US-201113328512-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 16, 2011 |
| Priority date | Dec 16, 2011 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
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An apparatus, processor, and method for synchronizing trace data. A processor includes multiple cores, and each core operates at a different local clock frequency. A global clock is distributed to each core, and a timestamp is generated using the global clock and the local clock. The timestamp and a local clock saturation value are included in each trace entry, and the local clock saturation value is equal to the ratio between the local clock and the global clock. The trace entries from separate cores are time-correlated in a post-processing phase based on the timestamp and local clock saturation values.
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What is claimed is: 1. An integrated circuit comprising a plurality of functional units, wherein each functional unit is configured to: operate responsive to a local clock, wherein each local clock is independent of local clocks corresponding to other functional units; and generate a plurality of trace entries, wherein each trace entry comprises trace data and synchronization data, and wherein the synchronization data enables trace entries from separate functional units to be ti…
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