Methods for presenting and sharing content in an environment
US-2024256032-A1 · Aug 1, 2024 · US
US8935549B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8935549-B2 |
| Application number | US-201113157498-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 10, 2011 |
| Priority date | Jun 30, 2010 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
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A microprocessor includes an input that receives an indication of the amount of instantaneous power being supplied to the microprocessor by an external power source. The microprocessor includes a plurality of processing cores that each receive the indication from the input and responsively determine an amount of energy consumed by the microprocessor during a preceding period. The period is a predetermined length of time. Each processing core operates at a frequency above a predetermined frequency in response to determining that the amount of energy consumed by the microprocessor during the preceding period is less than a predetermined amount of energy. The predetermined frequency may be: a frequency at which all the cores can operate over the predetermined length of time without the microprocessor consuming more than the predetermined amount of energy, or alternatively the maximum frequency at which system software may request the two or more processing cores to operate.
Opening claim text (preview).
We claim: 1. A microprocessor, comprising: an input, configured to receive an indication of an amount of instantaneous power being supplied to the microprocessor by an external power source; and a plurality of processing cores on a microprocessor package, wherein each processing core is configured with adaptive power throttling logic to: receive the indication from the input and responsively determine, independently of each other of the plurality of processing cores, an amount…
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