Storage device caching update target data unit while entering down-time mode and operating method of the storage device
US-2024345740-A1 · Oct 17, 2024 · US
Write-absorbing buffer for non-volatile memory
US8935484B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8935484-B2 |
| Application number | US-201113077842-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 31, 2011 |
| Priority date | Mar 31, 2011 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
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Abstract
Official abstract text for this publication.
A write-absorbing, volatile memory buffer for use with a processor module and a non-volatile memory is disclosed. The write-absorbing buffer operates as a dirty cache that can be used to look up both read and write requests, although allocating new blocks only for write requests and not read requests. The blocks are small sized, and a write-only least-recently used cache replacement policy is used to transfer data in the blocks to the non-volatile memory. The write-absorbing buffer can be used to store copy-on-write pages for at least one virtual machine associated with the processor module and reduce write overhead to the non-volatile memory.
First claim
Opening claim text (preview).
What is claimed is: 1. A data storage apparatus, comprising: a processor module; a non-volatile memory data store storing a base page for access by two or more virtual machines; and a write-absorbing buffer between the processor and the non-volatile memory data store to operate as a dirty first level cache that allocates new blocks only for write requests and not read requests, the write-absorbing buffer having at least one copy-on-write page associated with the base page for…
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- G06F12/0868Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Cross-Sectional Technologies · mapped topic
Physics · mapped topic
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- What does patent US8935484B2 cover?
- A write-absorbing, volatile memory buffer for use with a processor module and a non-volatile memory is disclosed. The write-absorbing buffer operates as a dirty cache that can be used to look up both read and write requests, although allocating new blocks only for write requests and not read requests. The blocks are small sized, and a write-only least-recently used cache replacement policy is u…
- Who is the assignee on this patent?
- Chang Jichuan, Ranganathan Parthasarathy, Roberts David, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification G06F12/0868. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jan 13 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).