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US-12147528-B2 · Nov 19, 2024 · US
Processing device with independently activatable working memory bank and methods
US8935472B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8935472-B2 |
| Application number | US-201213723294-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 21, 2012 |
| Priority date | Dec 21, 2012 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
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Abstract
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A data processing device is provided that includes an array of working memory banks and an associated processing engine. The working memory bank array is configured with at least one independently activatable memory bank. A dirty data counter (DDC) is associated with the independently activatable memory bank and is configured to reflect a count of dirty data migrated from the independently activatable memory bank upon selective deactivation of the independently activatable memory bank. The DDC is configured to selectively decrement the count of dirty data upon the reactivation of the independently activatable memory bank in connection with a transient state. In the transient state, each dirty data access by the processing engine to the reactivated memory bank is also conducted with respect to another memory bank of the array. Upon a condition that dirty data is found in the other memory bank, the count of dirty data is decremented.
First claim
Opening claim text (preview).
What is claimed is: 1. A data processing device comprising: an array of working memory banks associated with a processing engine; a dirty data counter (DDC) associated with an independently activatable memory bank within the array; the DDC configured to reflect a count of dirty data migrated from the independently activatable memory bank upon selective deactivation of the independently activatable memory bank; and the DDC configured to selectively decrement the count of dirt…
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- G06F12/0891Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Cross-Sectional Technologies · mapped topic
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- What does patent US8935472B2 cover?
- A data processing device is provided that includes an array of working memory banks and an associated processing engine. The working memory bank array is configured with at least one independently activatable memory bank. A dirty data counter (DDC) is associated with the independently activatable memory bank and is configured to reflect a count of dirty data migrated from the independently acti…
- Who is the assignee on this patent?
- Advanced Micro Devices Inc
- What technology area does this patent fall under?
- Primary CPC classification G06F12/0891. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jan 13 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).