Memory unit outputting a required time for a rewrite and method for controlling CPU

US8935461B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8935461-B2
Application numberUS-201313740948-A
CountryUS
Kind codeB2
Filing dateJan 14, 2013
Priority dateJul 20, 2010
Publication dateJan 13, 2015
Grant dateJan 13, 2015

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Abstract

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A memory includes a storage element which stores the number of times of application of a rewrite voltage pulse into a memory array, and a required-time output unit which outputs data representing a required time for a rewrite operation based on the number of times of application stored in the storage element.

First claim

Opening claim text (preview).

What is claimed is: 1. A memory unit having a memory array having a plurality of memory cells which each store one of at least two values including a first value and a second value, where the memory unit performs a rewrite operation by repeating application of a rewrite voltage pulse and verification, comprising: a storage element configured to store a number of times of the application of the rewrite voltage pulse into the memory array; and a required-time output unit configure…

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What does patent US8935461B2 cover?
A memory includes a storage element which stores the number of times of application of a rewrite voltage pulse into a memory array, and a required-time output unit which outputs data representing a required time for a rewrite operation based on the number of times of application stored in the storage element.
Who is the assignee on this patent?
Panasonic Corp
What technology area does this patent fall under?
Primary CPC classification G11C11/5628. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 13 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).