Systems And Methods With Auxiliary Control Boards Having Interface Devices
US-2024393848-A1 · Nov 28, 2024 · US
USB 3.0 device and control method thereof
US8935441B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8935441-B2 |
| Application number | US-201414324715-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 7, 2014 |
| Priority date | Jan 16, 2012 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A control method for a USB 3.0 (USB: Universal Serial Bus) device includes controlling the USB 3.0 device that has entered an SS.Disabled state to transition to an Rx.Detect state when a USB 2.0 connection is not established with a USB host even after a predetermined time, the USB 2.0 connection including any one of an HS (High Speed) connection, an FS (Full Speed) connection, and an LS (Low Speed) connection.
First claim
Opening claim text (preview).
What is claimed is: 1. A control method for a USB 3.0 (USB: Universal Serial Bus) device comprising: controlling the USB 3.0 device that has entered an SS.Disabled state to transition to an Rx.Detect state when a USB 2.0 connection is not established with a USB host even after a predetermined time, the USB 2.0 connection comprising any one of an HS (High Speed) connection, an FS (Full Speed) connection, and an LS (Low Speed) connection. 2. A USB 3.0 (USB: Uni…
Assignees
Inventors
Classifications
- G06F13/4068Primary
Physics · mapped topic
- G06F11/3051Primary
Physics · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US8935441B2 cover?
- A control method for a USB 3.0 (USB: Universal Serial Bus) device includes controlling the USB 3.0 device that has entered an SS.Disabled state to transition to an Rx.Detect state when a USB 2.0 connection is not established with a USB host even after a predetermined time, the USB 2.0 connection including any one of an HS (High Speed) connection, an FS (Full Speed) connection, and an LS (Low Sp…
- Who is the assignee on this patent?
- Renesas Electronics Corp
- What technology area does this patent fall under?
- Primary CPC classification G06F13/4068. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jan 13 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).